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Results: 7
Number of items: 7
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Piscitelli, R., & Pimentel, A. D. (2012). Interleaving methods for hybrid system-level MPSoC design space exploration. In J. McAllister, & S. Bhattacharyya (Eds.), 2012 International Conference on Embedded Computer Systems: Architectures, MOdeling and Simulation: proceedings: IC-SAMOS 2012, July 16-19, 2012, Samos, Greece (pp. 7-14). IEEE. https://doi.org/10.1109/SAMOS.2012.6404152
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Piscitelli, R., & Pimentel, A. D. (2012). A high-level power model for MPSoC on FPGA. IEEE Computer Architecture Letters, 11(1), 13-16. https://doi.org/10.1109/L-CA.2011.24
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Piscitelli, R., & Pimentel, A. D. (2012). A signature-based power model for MPSoC on FPGA. VLSI Design, 2012, 196984. https://doi.org/10.1155/2012/196984 -
Meloni, P., Pomata, S., Raffo, L., Piscitelli, R., & Pimentel, A. D. (2012). Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems. In J. McAllister, & S. Bhattacharyya (Eds.), 2012 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation: proceedings: IC-SAMOS 2012, July 16-19, 2012: Samos, Greece (pp. 310-317). IEEE. https://doi.org/10.1109/SAMOS.2012.6404191
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Piscitelli, R., & Pimentel, A. D. (2012). Design space pruning through hybrid analysis in system-level design space exploration. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012 (pp. 781-786). IEEE. https://doi.org/10.1109/DATE.2012.6176600
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Piscitelli, R., & Pimentel, A. D. (2011). A high-level power model for MPSoC on FPGA. In 2011 IEEE IPDPS Workshops & PhD Forum (IPDPSW): 25th IEEE International Parallel & Distributed Processing Symposium : 16-20 May, 2011, Anchorage, Alaska, USA (pp. 128-135). IEEE Computer Society. https://doi.org/10.1109/IPDPS.2011.133
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