Lazy reference counting for the Microgrid

Authors
Publication date 2012
Book title 2012 16th Workshop on Interaction between Compilers and Computer Architectures (INTERACT): 25 February 2012, New Orleans, USA: proceedings
ISBN
  • 9781467326131
Event 16th Workshop on on Interaction between Compilers and Computer Architectures (INTERACT’16)
Pages (from-to) 41-48
Publisher IEEE
Organisations
  • Faculty of Science (FNWI) - Informatics Institute (IVI)
Abstract
This papers revisits non-deferred reference counting, a common technique to ensure that potentially shared large heap objects can be reused safely when they are both input and output to computations. Traditionally, thread-safe reference counting exploit implicit memory-based communication of counter data and require means to achieve a globally consistent memory state, either using barriers or locks. Acknowledgeing the distributed nature of upcoming many-core chips, we have developed a novel approach that keeps reference counters at single physical locations and ships the counting operations asynchronously to these locations using hardware primitives, rather than implicitely moving the counter data between threads. Compared to previous methods, our approach does not require full cache coherency.
Document type Conference contribution
Language English
Published at https://doi.org/10.1109/INTERACT.2012.6339625
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