GOSSIPO-4: an array of high resolution TDCs with a PLL control

Open Access
Authors
  • F. Zappon
  • M. van Beuzekom
  • V. Gromov
  • R. Kluit
  • X. Fang
  • A. Kruth
Publication date 2012
Journal Journal of Instrumentation
Volume | Issue number 7
Pages (from-to) C01081
Organisations
  • Faculty of Science (FNWI) - Institute of Physics (IoP) - Institute for High Energy Physics (IHEF)
Abstract GOSSIPO-4 is a prototype chip featuring an array of high resolution Time to Digital Converters with a PLL control that has been taped out the 9th of August 2011. This prototype is the successor of GOSSIPO-3 test chip and the precursor of the 65k pixel chip TimePix3. The prototype is being developed to test a set of new features that will be used in TimePix3, including a 8 pixel structure sharing one fast oscillator with a new topology, a PLL to provide the control voltage to the oscillators, a custom fast counter and a new small-area cell library.
Document type Article
Note Topical Workshop on Electronics for Particle Physics 2011 (TWEPP-11)
Language English
Published at
Downloads
GOSSIPO-4.pdf (Final published version)
Permalink to this page
Back