On mapping distributed S-Net to the 48-core Intel SCC processor

Distributed S-NET is a declarative coordination
language and component technology primarily aimed at modern
multi-core/many-core chip architectures. It builds on the concept
of stream processing to structure dynamically evolving networks
of communicating asynchronous components. These components
themselves are implemented using a conventional language suitable
for the application domain. Our goal is to map Distributed
S-NET to the Intel SCC processor in order to provide users with
a simplified programming environment, yet still allowing them
to make use of the advanced features of the SCC architecture.
Following a brief introduction to the design principles of
S-NET, we sketch out the general ideas of our implementation
approach. These mainly concern the use of SCC’s message
passing buffers for lightweight communication of S-NET records
and control data between cores as well as remapping of large
data structures through lookup table manipulation. The latter
avoids costly memory copy operations that would result from
more traditional message passing approaches. Last, but not
least, we present prototypical performance measurements for our
communication primitives.