Rethread: A Low-cost Transient Fault Recovery Scheme for Multithreaded Processors

Authors
  • C. Zhang
Publication date 2014
Book title Proceedings: Ninth International Conference on Availability, Reliability and Security: ARES 2014: 8-12 September 2014, Fribourg, Switzerland
ISBN
  • 9781479942237
Event International Conference on Availability, Reliability and Security (ARES'14)
Pages (from-to) 88-93
Publisher Piscataway, NJ: IEEE Computer Society
Organisations
  • Faculty of Science (FNWI) - Informatics Institute (IVI)
Abstract
Transient fault recovery is important in processor availability. However, significant silicon or performance over-heads are characteristics of existing techniques. We uncover an opportunity to reduce the overheads dramatically in modern processors that appears as a side-effect of introducing hardware multithreading to improve performance. We observe that threads are usually short code sequences with no branches and few memory side-effects, which means that the number of checkpoints is small and constant. In addition, the state structures of a thread already presented in hardware can be reused to provide check pointing. In this paper, we demonstrate this principle of using a hardware/software co-design called Rethread, which features compiler-generated code annotations and automatic recovery in hardware by restarting threads. This approach provides the ability to recover from transient faults without dedicated hardware. Moreover, results show performance degradation under both fault-free condition (less than 5%) and as a function of fault rate.
Document type Conference contribution
Language English
Published at https://doi.org/10.1109/ARES.2014.18
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