| Authors |
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| Publication date |
2008
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| Journal |
Mathematical Structures in Computer Science
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| Volume | Issue number |
18 | 02
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| Pages (from-to) |
373-409
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| Organisations |
-
Faculty of Science (FNWI) - Informatics Institute (IVI)
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| Abstract |
We model micro-architectures with non-pipelined instruction processing and pipelined instruction processing using Maurer machines, basic thread algebra and program algebra. We show that stored programs are executed as intended with these micro-architectures. We believe that this work provides a new mathematical approach to the modelling of micro-architectures and the verification of their correctness and the anticipated speed-up results.
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| Document type |
Article
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| Published at |
https://doi.org/10.1017/S0960129507006548
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