A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA Project

Authors
  • M. Rabozzi
  • R. Brondolin
  • G. Natale
  • E. Del Sozzo
  • M. Huebner
  • A. Brokalakis
  • C. Ciobanu
  • D. Stroobandt
  • M.D. Santambrogio
Publication date 2017
Host editors
  • M. Hübner
  • R. Reis
  • M. Stan
  • N. Voros
Book title 2017 IEEE Computer Society Annual Symposium on VLSI : ISVLSI 2017
Book subtitle proceedings : 3-5 July 2017, Bochum, North Rhine-Westfalia, Germany
ISBN
  • 9781509067633
ISBN (electronic)
  • 9781509067626
Event 2017 IEEE Computer Society Annual Symposium on VLSI
Pages (from-to) 368-373
Publisher Los Alamitos, Calif.: IEEE Computer Society
Organisations
  • Faculty of Science (FNWI) - Informatics Institute (IVI)
Abstract
As the power wall has become one of the main limiting factors for the performance of general purpose processors, the trend in High Performance Computing (HPC) is moving towards application-specific accelerators in order to meet the stringent performance requirements for exascale computing while still satisfying power budget constraints. Within this context, reconfigurable devices, and more specifically FPGA-based systems, represent a promising solution able to achieve highly energy efficient computations without jeopardizing performance. Nevertheless, the exploitation of reconfigurable hardware is still limited due to the hardware-software co-design challenges that it poses, the time consuming design space exploration process and the programming complexity. To overcome these challenges, the EXTRA European project addresses the reconfigurability of such devices as a first-class feature, covering the entire stack from the system architecture up to the application. Within this paper, we present the effort of the EXTRA project towards the definition of an adaptive open platform for the optimization and implementation of applications on high performance reconfigurable architectures. The underlying infrastructure of the platform is here presented, highlighting its capability to integrate modules from different developers in order to stimulate external contributions and open research.
Document type Conference contribution
Language English
Published at
https://doi.org/10.1109/ISVLSI.2017.71 (Final published version)
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