- Gas phase considerations for the deposition of thin film silicon solar cells by VHF-PECVD at low substrate temperatures
- 33rd IEEE Photovoltaic Specialists Conference (PVSC), San Diego, California
- Book/source title
- Proceedings of the 33rd IEEE Photovoltaic Specialists Conference, San Diego, California
- Piscataway, NJ: IEEE
- Document type
- Conference contribution
- Faculty of Science (FNWI)
- Informatics Institute (IVI)
Fabrication of thin film silicon solar cells on cheap plastics or paper-like substrate requires deposition process at very low substrate temperature, typically ≤ 100 °C. In a chemical vapor deposition process, low growth temperatures lead to materials with low density, high porosity, high disorder and high defect density. This can be partly attributed to the small diffusion length of precursors on the growing surface and to the temperature range below the glass transition temperature of the deposited films. Plasma enhanced deposition technology helps improving material quality at low deposition temperatures by providing extra energy to the growing surface by ion bombardment. In this paper we have explored the gas phase conditions in a very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) process at low temperatures. Using a retarding field ion energy analyzer installed on the substrate holder in a deposition system called ATLAS, we measured ion flux and ion energy at various substrate temperatures (39, 100 and 200°C). The pressure was fixed at 0.16 mbar and the silane part (silane/(silane+hydrogen)) at 0.166. We observed that with a decrease in temperature, the ion flux hardly changes, whereas the ion energy decreases. Similar results were obtained from a simulation of a 2D plasma discharge. As the deposition rate does not vary significantly with temperature, we infer that the average ion energy per deposited atom decreases with decreasing temperature. This explains the high porosity of the materials deposited at low temperatures. To obtain device quality material at 100 °C, a lower silane part (0.063) was therefore needed than in the case of 200 °C (silane part of 0.5). We have achieved 5.3% efficiency for an amorphous silicon test cell, deposited at 100 °C on a smooth Ag/ZnO coated stainless steel foil.
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