- Thread extraction for polyadic instruction sequences
- Number of pages
- Document type
- Faculty of Science (FNWI)
- Informatics Institute (IVI)
Instruction sequences are often fragmented. An important reason for instruction sequence fragmentation is that the execution architecture at hand to execute instruction sequences sets bounds to the size of instruction sequences. In this paper, we study instruction sequences that have been split into fragments. The purpose is to develop a theoretical understanding of this matter. The possible joint behaviours exhibited by a collection of fragments on execution are explained in terms of threads as considered in basic thread algebra. In this way, a setting is provided in which the slow-down results of instruction sequence fragmentation can be analysed.
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